Russell Josephson

That YUG meeting was awesome, a bunch of short talks covering a host of cool yosys FPGA use cases! Mine: 5 minute overview of how to learn and skip the wait for your digital ASIC design, dev and try everything with a drop in replacement FPGA carrier board.

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NEED PRECISION OPTICAL METROLOGY? AOM IN TUCSON, AZ, HAS ANSWERS. I’ve just been talking to Tyler Steele, part of the dedicated team working with AOM - Arizona Optical Metrology LLC. Established in 2009, they are well-known globally as a leading computer-generated hologram (CGH) supplier for the world’s most challenging optical engineering projects. Often, metrology is the limiting factor in fabricating complex optical surfaces, as methods for qualification and feedback are not precise, flexible, or capable enough. A CGH overcomes many of these surface testing challenges to make optical surface qualification feasible for most complex surfaces while maintaining precision, resolution, and speed. EXPANDING HORIZONS Now, AOM are reaching out to bring CGH technology to a broader set of optics and photonics applications. Complex optics are being used more widely than ever–and at precision and production volumes that seemed impossible just a few years ago. The challenges these applications face are on par with the biggest space telescope projects of the past, but with a fraction of the budget and extremely tight timelines to complete. Think of the volume market for AR glasses. AOM - Arizona Optical Metrology LLC is delivering new and novel solutions to optics projects and programs to address this new world of optics production. They enable a new level of precision and ease of use for complex optics metrology from surface figure error of aspheres, freeforms, and off-axis sections to optical system alignment. A CGH converts an interferometer regular wavefront (collimated or spherical) into a custom-designed wavefront that matches the unique shape of the surface to be tested. The result is an interferometric null test when the test optic is well aligned to the CGH. In my conversation below, Tyler answers the Optica question: What can you do for other Optica corporate members, and what can they do for you? Quite a lot, it seems. Together, the future of optics is very bright indeed! Contact them directly or drop me a line for an introduction.

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Don't mix this signal: Buy a Mixed Signal Oscilloscope from Keysight Technologies. Capture & isolate elusive glitches & anomalies where it isn't possible to solve elsewhere. 🛒: https://ow.ly/x2BK50RuQSY #Oscilloscopes #Solutions

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Stephen V. Chavez delves into PCB's future with Anaya Vardya from American Standard Circuits! HDI and Ultra HDI are revolutionizing electronics with denser layouts and superior signal integrity. Uncover the challenges, collaboration tips, and the power of education in mastering these tech marvels. https://lnkd.in/gksAm32s

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You still have a few hours to ask your #RF material questions. Post on the link below and our experts will get back to you! #radiofrequency #pcb #pcbdesign #pcbmanufacturing

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THE TWO SIDES OF SIGNAL INTEGRITY. Successful high-speed system design hinges on achieving integrity in the two signals below (blue and red). They are: (1) the input to your Rx after a lossy channel (blue), and (2) the output of your Rx Equalization (EQ, red) where bitstream logic levels are determined. Let’s talk about the biggest issues affecting both signals. (1) Blue Signal (Rx input). With loss in today’s channels approaching 40 dB, a 1 Volt launched at a Tx arrives at the Rx as only 10 mV. Because the slightest wiggle or change in slope is actually a bit change, this signal must arrive with 10 mV accuracy. Look closely at the (blue) signal and you’ll see what I mean. Small (10 mV) signal impairments due to impedance discontinuities in your PCBs, connectors, vias, etc. will raise your Bit Error Rate (BER). This is the #2 cause of serial link failure, and the focus of my 5 posts last week. (2) Red Signal (Rx EQ output). For more than three generations of serial links, signal integrity/performance has been measured beyond the Rx EQ deep inside the IC (red). As the image (below) reveals, this is the only place an eye opening – and hence valid logic levels – is visible (compare blue and red eyes). Incorrect/non-optimal Tx/Rx EQ settings is the #1 cause of link failures, so correcting EQ will be the topic of this week’s posts. Many times Tx EQ needs to be turned off or used only for pre-cursors, thus preserving signal amplitude. Not sure what that means? Stay tuned. Blue and Red - these define the two days in my LIVE Masterclass. On Day 1 (blue) we discuss the ‘new school’ SI skills you need to deliver signals through your passive interconnect with 10 mV accuracy. On Day 2 (red) attendees learn how to read EQ’d pulse responses to open eyes and improve BERs ‘hands-on’ using labs that show quintillions of bits with the click of a mouse. Don’t miss out. June 5/6 SI Masterclass in Silicon Valley: https://lnkd.in/dY7KiKmX #signalintegrity #siforees

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Reflecting on a time when 10 Gbps was the frontier of PCB data rates brings back memories, doesn't it? 😎 This DesignCon2009 paper was a trailblazer in the systematic approach to correlating analysis with measurements for designing predictable interconnects. It describes the first physical layer reference design platform (PLRD-1) featuring 30 test structures to validate our modeling methodology, proving that electromagnetic analysis could indeed predict PCB interconnect behavior. Plus, it was the world's introduction to Simbeor electromagnetic signal integrity software. Fast forward to today, with interconnects pushing beyond 100 Gbps, the predictability principles laid down in this paper are more crucial than ever. #simbeor #DesignCon #SignalIntegrity #PCBDesign #ElectromagneticAnalysis #electromagnetics #signal_integrity

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Do you know what is Source Measure Unit (SMU)? Essentially, Keithley SMUs are fast-response, read-back voltage and current sources with high accuracy measurement capabilities, all tightly integrated in a single enclosure. SMUs combine the capabilities of a semiconductor parametric analyzer, precision power supply, true current source, Precision Digital Multimeter (DMM), low-frequency ARB pulse generator, electronic load, and trigger controller in one box. This is a four-quadrant instrument. #Semiconductor,#investigadoresUanl,#sistemasIntegrados,#Electronica,#IngenieriaElectrica,#InteligenciaArtificial,#Hardware,#VehiculosElectricos,#Tecnologia,#Ingenieria,#Testing,#Semiconductores,#Monterrey,#Coahuila,#HomeAppliances,#Electronics,#Medicaldevices,#Aerospace,#ElectricVehicles,#Automotive,#Manufacturing,#SupplyChain,#Nearshore,#Engineeringinnovation,#Design

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When adding stitching vias to a PCB, strategic placement is crucial. It's essential to position them around the edges of critical components, high-speed signal traces, and ground planes. This ensures effective shielding and enhanced signal integrity. The appropriate size and spacing of stitching vias are chosen based on your application's specific requirements and the PCB's material. #PCBdesign

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SWIR camera can see the invisible things in smoggy environment.

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RISC-V technology is making inroads into automotive electrical/electronic architecture design. Read all about it: https://hubs.la/Q02zTLgf0 #RISCV #SDV #V2X #ISO26262

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Enough of eyeballing over your extracted DSPF, in a text-editor, jumping back and forth, between Layout, Schematic, testbench and open DesignReview to check locations, parameters, debug, probe, pinpoint. Sit back and relax, start using I-DSPF & do all you wanted - just way faster, with ease..

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Teledyne LeCroy PCIe 6.0 M616 Exerciser / Analyzer Demo - Flit mode traffic generation at 64.0 GT/s with PAM-4 signaling. https://lnkd.in/g_GBp-yp

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This is a LIVE REAL TIME DEMO of a post-layout electromagnetic signal integrity analysis of PCB interconnects... - see more at https://lnkd.in/guCuDx-g #simbeor #electromagnetics #signal_integrity

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Setting the Pace with #PCIe® Gen 7: Alphawave Semi's Success at PCIe® Devcon 2024 https://lnkd.in/gM_E7mAB

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Multi-vendor interoperability testing is critical to the deployment of 800G. Ildefonso Polo, VP of Product Marketing, discusses the topic in this Ethernet Alliance blog post. https://bit.ly/3Usk1jU #interop #interoperatbility #voiceofethernet #ethernet #ofc24 #veexinc

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New visualization and compliance validation capabilities in Simbeor 2024.01 make it extremely easy to do analysis with existing Touchstone models of interconnects, as demonstrated in this demo video https://lnkd.in/gBNzJBke

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both the #Quest3 and #VisionPro is the use of traditional computer displays, but scaled down to fit in front of our eyes. The #display technology is impressive, but it's still an evolution of screen output. #Stanford's approach throws that out so that the computer doesn't directly drive a #screen. Instead, it controls #light paths using the #waveguides Stanford's VR breakthrough could spell the end of clunky headsets - thanks to AI https://lnkd.in/gbkY8GQH

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